Regviz

Espressif Systems /ESP32-P4 /UHCI0 /INT_RAW

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INT_RAW

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-P4/UHCI0/INT_RAW#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RX_START_INT_RAW)RX_START_INT_RAW 0 (TX_START_INT_RAW)TX_START_INT_RAW 0 (RX_HUNG_INT_RAW)RX_HUNG_INT_RAW 0 (TX_HUNG_INT_RAW)TX_HUNG_INT_RAW 0 (SEND_S_REG_Q_INT_RAW)SEND_S_REG_Q_INT_RAW 0 (SEND_A_REG_Q_INT_RAW)SEND_A_REG_Q_INT_RAW 0 (OUT_EOF_INT_RAW)OUT_EOF_INT_RAW 0 (APP_CTRL0_INT_RAW)APP_CTRL0_INT_RAW 0 (APP_CTRL1_INT_RAW)APP_CTRL1_INT_RAW

Description

UHCI Interrupt Raw Register

Fields

RX_START_INT_RAW

Indicates the raw interrupt of UHCI_RX_START_INT. Interrupt will be triggered when delimiter is sent successfully.
TX_START_INT_RAW

Indicates the raw interrupt of UHCI_TX_START_INT. Interrupt will be triggered when DMA detects delimiter.
RX_HUNG_INT_RAW

Indicates the raw interrupt of UHCI_RX_HUNG_INT. Interrupt will be triggered when the required time of DMA receiving data exceeds the configuration value.
TX_HUNG_INT_RAW

Indicates the raw interrupt of UHCI_TX_HUNG_INT. Interrupt will be triggered when the required time of DMA reading RAM data exceeds the configuration value.
SEND_S_REG_Q_INT_RAW

Indicates the raw interrupt of UHCI_SEND_S_REG_Q_INT. Interrupt will be triggered when UHCI sends short packet successfully with single_send mode.
SEND_A_REG_Q_INT_RAW

Indicates the raw interrupt of UHCI_SEND_A_REG_Q_INT. Interrupt will be triggered when UHCI sends short packet successfully with always_send mode.
OUT_EOF_INT_RAW

Indicates the raw interrupt of UHCI_OUT_EOF_INT. Interrupt will be triggered when there are errors in EOF.
APP_CTRL0_INT_RAW

Indicates the raw interrupt of UHCI_APP_CTRL0_INT. Interrupt will be triggered when UHCI_APP_CTRL0_IN_SET is set to 1.
APP_CTRL1_INT_RAW

Indicates the raw interrupt of UHCI_APP_CTRL1_INT. Interrupt will be triggered when UHCI_APP_CTRL1_IN_SET is set to 1.

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data